Embedded Tech Trends 2025, January 13-14, 2025 in San Antonio, TX.
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Brian started off the event by reviewing highlights from market research he recently conducted for VITA. VITA publishes quarterly reports reviewing activity from financial performance to new products, contracts, and mergers in the VITA technology market. An annual report goes deeper into revenue estimates of VITA technology suppliers forecasting market sizes and shares across the various VITA technologies. The 2023 annual report is now available. (www.vita.com/MarketData)
In 2008, Techway pioneered the use of FMC on PCIe boards to extend the FPGA technology outside the military and aerospace arena. Thanks to VITA 57 FMC, engineers can now select the best FPGA [field-programmable gate array] and adapt I/O to their needs. This presentation demonstrated how easy it is to design “evolutive and reusable” systems for real-time applications.
Open architecture systems demand cutting-edge capabilities to be competitive. Commercial applications continue to drive the need for increasing performance, standardization of core technologies drives interoperability, while a hierarchy of industry standards builds a robust ecosystem. The relentless increase of performance and data availability in a SWaP- [size, weight, power, and cost]-constrained environment enables new capabilities each year. Simon discussed how open architecture systems leverage -dge capabilities.
As the amount of sensor data describing the world around us continues to surge, the need for high-performance processing at the edge becomes increasingly important. “Performance at the Edge: Emerging Trends in Embedded HPC” offers a comprehensive exploration into the evolving world of embedded high-performance computing (HPC). This presentation will shed light on the advancements in embedded architectures at the system, board, and chip level along with the increasing role of AI and machine learning integration at the edge. As industries from industrial to defense demand real-time data processing and decision-making, embedded HPC requires greater performance per watt of power used than ever before.
System-on-modules (SoMs) come in all shape and sizes. Applications using SoMs include test and measurement, transportation, entertainment, medical, industrial automation, and many others. SoMs also support a variety of compute engines including x86, Arm, power, GPUs, FPGAs, RISC-V, and more. The integration of RF ADCs/DACs and signal chains will influence SoM architectures in the years to come.
As compute engines increase in performance, pin count and density, SoM designers are challenged to define component placement, PCB layout, pinout, and interconnect options for digital, analog, RF, power, and control signals. Additionally, routing I/O expansion protocols on SoMs and SoM carrier cards enable rapid prototyping and system emulation.
In this presentation, Matt detailed popular open-standards SoM interfaces growing in popularity. Additionally, he summarized popular I/O expansion protocols common on compute engine evaluation kits, high-performance embedded SoMs, and SoM carrier cards.
Moving the industry to simplify the complex integration challenges of the power system is achieved through high-efficiency, low-noise, and low-emission power engine design. The result is faster time to market and ease of installation for the integrator while reducing the engineering challenges.
In 10 years, the incredible technological innovations (integrated circuits, PCB materials, connectors …) which have made it possible to increase Ethernet performance tenfold have directly impacted the standardization and architectures of embedded systems. While hybrid switches primarily offered PCIe (or SRIO) for the data plane, limiting Ethernet to system-control signaling, 10G/40G Ethernet fabrics have gradually authorized the control/data planes mix. Then, dual-fabric Ethernet products arrived to meet the needs for plane isolation (control/data) for security reasons, so central for SOSA applications. On the media side, optical fiber, previously limited to front-end connectivity, has appeared on the backplane. Today, new signaling, allowing transfer speeds to be further doubled (25/50/100G), is now spreading across product offerings as time sensitive networking (TSN) technologies like Precision Time Protocol and scheduling/traffic shaping are being called on to allow systems to meet demanding real-time tasking and latency requirements.
Recent operations in Ukraine have proven that introducing new technologies, tactics, techniques, and procedures can significantly affect the 21st-century battlefield. The U.S. military is integrating the lessons learned from this and other recent conflicts into the Joint All Domain Command and Control (JADC2) warfighting concept. The U.S. Department of Defense (DoD) is seeking to achieve decision superiority through JADC2 “to produce the warfighting capability to sense, make sense, and act at all levels and phases of war, across all domains, and with partners, to deliver information advantage at the speed of relevance." While this definition captures what JADC2 aims to achieve, it says little about how to achieve it. In this presentation, Tim used the OODA [observe, orient, decide, and act] loop and a Project Convergence use case (specifically, wet gap crossing) to show how AI will enable decision superiority by reducing risk in this complex and relevant scenario.
The numerous game-changing benefits of directly digitizing wideband RF analog signals have altered the trajectory of future software radio architectures. By eliminating complex and costly analog RF tuners and upconverters, Direct RF ADCs and DACs can digitize K-band RF signals at 64 GS/sec, and capture signal bandwidths up to 30 GHz. By boosting performance while reducing latency plus SWaP-C, Direct RF specifically addresses the most critical needs of advanced radar and EW systems. However, these many benefits can only be realized with judicious allocation of specialized digital processing resources to support the wealth of critical information in the fire hose of data to and from these data converters. Widespread interest and rapid adoption of Direct RF technology is inspiring new silicon device solutions with higher levels of integration to meet this objective. This presentation offered the latest strategies and technologies to take advantage of Direct RF in critical defense applications.
Computing systems for the space market have historically been highly optimized for their intended application with little priority given to commonality or reuse. A new modular approach that balances flexibility with interoperability using open standards and commercial off-the-shelf (COTS) products will speed development and reduce costs. Combine this approach with the latest radiation-tolerant Adaptive Compute Acceleration Platforms (ACAP), which include FPGA fabric, rich feature sets, and powerful I/O in a scalable power architecture – all powered by TI – and the potential is sky-high.
The growth of processing parallelism has resulted in a corresponding explosion of performance and capabilities, but not all processor cores and threads are created equally. For designers of critical real-time processing systems, what happens under the hood matters. Aaron presented insight into performance and system implications of today’s latest multicore and hybrid-core processors which software developers and systems designers need to understand to so they can exert tight control over the processing systems used in embedded aerospace and defense (A&D) systems.
RF is very complex and difficult to grasp all its nuisances. RF signals are used in many aspects of embedded computing. Steve walked the group through the most important concepts and what they mean to embedded computing.
Solving the Unsolvable: How Technology Acceleration is Transforming Information Delivery for New Cap (pdf)
DownloadDesigning Modularity into Rugged Optical Transceivers Enables Flexible System Solutions (pdf)
DownloadConsiderations in Architecting an HPEC GPGPU AI/ML System that Aligns to SOSA’s Goals (pdf)
DownloadRapid increase of compute performance from edge to network to cloud. Acceleration of new technology like generative or predictive AI that can be distributed throughout the end-to-end compute chain. New security paradigms required to ensure data security up and down; driving the need to plan and implement specific use case security considerations from end-to-end. Quantum computing, on the horizon and possibly entering with-in a standard business-planning window of five to seven years, adds a transformative and potentially disruptive computing domain. Ken illustrated the progress being made with new technologies to solve these complex problems.
Many aerospace, defense, and marine system applications exist with unbalanced input and output channel counts that need to be configured to match different platform needs, or where the multiple input and output link endpoints are physically distributed within a platform. TE’s expert provided an overview of its MULTIGIG RT fiber-optic (FO) chiclet based optical transceiver (CBOT) platform, illustrated its modular flexibility to address these various system applications, and outlined future extensions of this product’s capability for longer reach, higher density, and increasing data rates.
SOSA’s impact on the rugged embedded market is now being seen more clearly than ever with many vendors aligning their products technical needs to SOSA’s goals. One of those goals is that VPX systems and the software that runs on them must be designed for reuse and flexibility both in mission and during maintenance. Deploying Ethernet as the full stack digital backbone has been the de facto method to achieve these goals, but it is important to also consider the limitations and potential performance impacts of a packetized network architecture on system resources. System architects looking to deploy cutting-edge AI/ML processing with GPGPUs to process the actual RF (VRT, MORA) and/or EO/IR data serviced by these high-bandwidth Ethernet backbones must fully understand the full architecture stack (hardware and software) to be successful. This talk detailed examples of factors to consider in architecting an AI/ML GPGPU system and what the industry needs to address NOW to avoid offering a false promise of capability to the mission set.
Over the last few years, we've heard a lot about high-bandwidth Ethernet. Nigel’s presentation examined the benefits that can be realized by using separate control and data planes based on Ethernet and why using an analogous architecture to other markets and industries will pay dividends. Some of these benefits can be realized through flexible software applications and others through the use of real-time extensions.
The shock waves created by electronics obsolescence are profound. Typically beginning with component discontinuation and cascading up to end-users’ fielded equipment, the avalanches of cross-industry costs and inefficiencies throughout the supply chain are relentless and ubiquitous. In response to the chronic pain that electronics obsolescence continues to inflict throughout supply chains on individual companies and their customers, there has emerged a new category of service providers: Legacy Equipment Manufacturers, or LEMs. Many OEMs and end users embrace the idea of forming new strategic supplier relationships in support of their internal capabilities. LEMs have emerged as new type of strategic sourcing partner, because they present an innovative capability for all affected companies to deal with electronics obsolescence. Ethan laid out the LEM business model and what its emergence means to achieving feasible and resilient supply chains through the embedded electronics industry, all the way up to end users.
OpenVPX is a living standard quickly adapting to the needs of the market. Greg Rocco is the father of OpenVPX (VITA 65): His open VPX tutorial is the beginning point for anyone new to the VPX concept and is a handy reference source for anyone designing with VPX. He reviewed the latest enhancements and changes to OpenVPX that will be in the 2023 release, now in its final approval stage.